Field of the Invention
With the progress in high integration and miniaturization of electronic devices in recent years, LSI chips are being reduced to the same size as a semiconductor package while the high integration of chips arranged in two dimensions within a package is reaching its limits. Therefore, it is necessary to divide the LSI chips and stack them in three dimensions in order to increase the mounting density of chips within a package. In addition, it is also necessary to reduce the distance between stacked circuits in order to operate the entire semiconductor package stacked with LSI chips at high speeds.
Thus, in response to the above stated demands, a through-hole electrode substrate arranged with a connection part which passes through the front and back surfaces of the substrate is proposed as an interposer between LSI chips. In this type of through-hole electrode substrate, the through-hole electrode is formed by filling a conductive material (Cu etc) into a through-hole using electrolytic plating.
An example of a through-hole electrode substrate 10 is shown in FIG. 22. The through-hole electrode substrate 10 is arranged with a silicon substrate 11, a through-hole 12 which passes through the substrate in the thickness direction of the silicon substrate 11, a through-hole electrode 14 comprised from copper (Cu), nickel (Ni), gold (Au), multi-layer plating (Cu/Ni/Au) etc formed within the through-hole 12, and a land 15 comprised of copper (Cu), gold (Au), multi-layer plating (Cu/Ni/Au) etc arranged on the upper and lower surfaces of the through-hole electrode 14. Furthermore, although not shown in FIG. 22 an insulation film comprised of silicon oxide SiO2 etc is formed on the upper and lower surface from an inner wall of the through-hole 12.
The through-hole electrode substrate 10 shown in FIG. 22 is manufactured by the method described below. First, a hole which does not pass completely through the substrate is formed using a method such as RIE (Reactive Ion Etching), DeepRIE, light etching or wet etching on one surface of the silicon substrate 11. Next, the silicon substrate 11 is thinned by a method such as grinding etc from the other surface of the silicon substrate 11, that is, from the surface which is opposite to the surface in which the hole is formed, and the hole passes completely through the substrate. An insulation film (not shown in the diagram) is formed on the inner surface of this through-hole 12 and on both surfaces of the silicon substrate 11 using a method such as thermal oxidation or CVD (Chemical Vapor Deposition). Next, after burying a conductive material comprised of a metal material such as Cu etc which becomes the through-hole electrode 14 within the through-hole 12 which is formed with the insulation film, excess conductive material which sticks out from the through-hole 12 is removed using a method such as CMP (Chemical Mechanical Polishing). Following this, a land 15 is formed by patterning and which becomes the wiring and electrode pad made of copper (Cu) etc on the upper and lower surfaces of the silicon substrate 11.
However, in the through-hole electrode substrate 10 manufactured by the manufacturing method described above it is confirmed that a blow off phenomenon occurs in a wiring layer 15 or raised parts or cracks are produced within the through-hole 12 during an anneal process.
For example, Japanese Laid Open Patent 2002-26520 and Japanese Laid Open Patent 2000-252599 are proposed in order to reduce the blow off phenomenon which occurs in a wiring layer or raised parts or cracks produced in an insulation film during an anneal process of the manufacturing process of the above described through-hole electrode substrate. In a multi-layer wiring substrate described in Japanese Laid Open Patent 2002-26520, an opening is arranged so as to pass through the top and bottom of a via island arranged directly above a via hole conductor filled with a conduction paste and an expansion of a gas component or water component included within the conduction paste is suppressed during thermal process. In the print substrate described in Japanese Laid Open Patent 2000-252599, a hole is arranged which is connected with the external atmosphere and the conductive film which covers the surface of a sealing component of a resin which is filled into a through-hole, and the gas which is discharged from the a sealing component is released to the external atmosphere by adding heat during reflow.
Description of the Related Art
However, the multi-layer wiring substrate and the print substrate proposed in the Japanese Laid Open Patent 2002-26520 and Japanese Laid Open Patent 2000-252599 described above deal with defects produced by gas discharged from a through hold electrode filled in which the through-hole is filled with a conductive paste or resin, but do not deal with defects produced by gas discharged from a through-hole electrode in which a through-hole formed with an insulation film is filled with a metal material as stated above.
A metal material such as copper (Cu) etc which is filled into the through-hole 12 as the through-hole electrode 14 stretches, gas (water component (H2O) or hydrogen (H2) etc) which still remains in the metal material is discharged during the anneal process, land 15 is raised up and the occurrence of the blow off phenomenon was confirmed. In addition, in the anneal process, when the heating temperature is raised above, for example, 400° C., raised parts and cracks are produced in an insulation film due to the difference in a thermal expansion coefficient between a metal material such as Cu etc which is filled as the through-hole electrode 14 and an insulation material such as SiO2 etc used as the insulation film, and if a metal material enters into the cracks there is a possibility that shorts will occur between through-hole electrodes. The through-hole electrode substrate 10 shows that it is necessary to set the heating temperature during the anneal process low in order to prevent this phenomenon. However, the anneal process is necessary and measures are required because the discharge of gas from the above described through-hole electrode 14 occurs even in the case where a heating temperature does not cause cracks.
In addition, in the manufacturing process of the through-hole electrode substrate, tilt is produced in a part of the through-hole, a misalignment is produced between the position of an opening formed in an insulation film which is formed on the upper and lower surfaces of a the silicon substrate and the formation position of the through-hole, and defects such as [step out] or [disconnection] of the rand described above are produced by the amount of misalignment of the opening with respect to the lower surface of the through-hole in which tilt is produced. Measures are necessary for dealing with defects that are produced by tilt of this through-hole.